The semiconductor industry has experienced rapid growth and demands for highly integrated semiconductor devices are increasing. Technological advances in integrated circuit (IC) design and materials have produced generations of ICs. Each generation has smaller and more complex circuits than previous generations. In the course of IC evolution, functional density has generally increased while geometric size (i.e., the smallest component (or line) that can be created through a fabrication process) has decreased.
As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design issues have resulted in the development of three-dimensional designs, such as the fin field effect transistor (FinFET). FinFETs are fabricated with a thin vertical “fin” (or fin structure) extending from a substrate. The channel of the FinFET is formed in this vertical fin. A gate is provided over the fin. The advantages of a FinFET may include reducing the short channel effect and providing a higher current flow.
Although existing FinFET devices and methods of fabricating FinFET devices have generally been adequate for their intended purposes, they have not been entirely satisfactory in all respects.